Application Specific Instruction Set Processors

Design of Energy-Efficient Application-Specific Instruction Set Processors by Heinrich Meyr [Repost]

Design of Energy-Efficient Application-Specific Instruction Set Processors by Heinrich Meyr
English | Feb 29, 2004 | ISBN: 1402077300 | 255 Pages | PDF | 2 MB

After a brief introduction to low-power VLSI design, the design space of ASIP instruction set architectures (ISAs) is introduced with a special focus on important features for digital signal processing.
Design of Energy-Efficient Application-Specific Instruction Set Processors

Design of Energy-Efficient Application-Specific Instruction Set Processors by Tilman Glцkler, Heinrich Meyr ;
Publisher: Springer; 1 edition (February 29, 2004) | ISBN-10: 1402077300 | PDF | 1 Mb | 240 pages

After a brief introduction to low-power VLSI design, the design space of ASIP instruction set architectures (ISAs) is introduced with a special focus on important features for digital signal processing. Based on the degrees of freedom offered by this design space, a consistent ASIP design flow is proposed: this design flow starts with a given application and uses incremental optimization of the ASIP hardware, of ASIP coprocessors and of the ASIP software by using a top-down approach and by applying application-specific modifications on all levels of design hierarchy. A broad range of real-world signal processing applications serves as vehicle to illustrate each design decision and provides a hands-on approach to ASIP design. Finally, two complete case studies demonstrate the feasibility and the efficiency of the proposed methodology and quantitatively evaluate the benefits of ASIPs in an industrial context.
Design of Energy-Efficient Application-Specific Instruction Set Processors by  Tilman Glцkler

Design of Energy-Efficient Application-Specific Instruction Set Processors by Tilman Glцkler, Heinrich Meyr ;
Publisher: Springer; 1 edition (February 29, 2004) | ISBN-10: 1402077300 | PDF | 2,7 Mb | 240 pages

After a brief introduction to low-power VLSI design, the design space of ASIP instruction set architectures (ISAs) is introduced with a special focus on important features for digital signal processing. Based on the degrees of freedom offered by this design space, a consistent ASIP design flow is proposed: this design flow starts with a given application and uses incremental optimization of the ASIP hardware, of ASIP coprocessors and of the ASIP software by using a top-down approach and by applying application-specific modifications on all levels of design hierarchy. A broad range of real-world signal processing applications serves as vehicle to illustrate each design decision and provides a hands-on approach to ASIP design. Finally, two complete case studies demonstrate the feasibility and the efficiency of the proposed methodology and quantitatively evaluate the benefits of ASIPs in an industrial context.
Ultra-Low Energy Domain-Specific Instruction-Set Processors

Francky Catthoor, Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Angeliki Kritikakou, Javed Absar, "Ultra-Low Energy Domain-Specific Instruction-Set Processors"
Springer | 2010 | ISBN: 9048195276 | 400 pages | PDF | 3,6 MB

X86 Instruction Set Architecture : Comprehensive 32- and 64- bit Coverage (repost)  eBooks & eLearning

Posted by MoneyRich at Oct. 6, 2016
X86 Instruction Set Architecture : Comprehensive 32- and 64- bit Coverage (repost)

X86 Instruction Set Architecture : Comprehensive 32- and 64- bit Coverage by Tom Shanley
English | 2010 | ISBN: 0977087859 | 1564 Pages | PDF | 28 MB

The Instruction Set Architecture, or ISA, is defined as that part of the processor architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external IO.
Application Analysis Tools for ASIP Design: Application Profiling and Instruction-set Customization (repost)

Application Analysis Tools for ASIP Design: Application Profiling and Instruction-set Customization
by Kingshuk Karuri, Rainer Leupers
English | 2011 | ISBN: 144198254X | 232 pages | PDF | 5.83 MB
Application-Specific Mesh-based Heterogeneous FPGA Architectures [Repost]

Husain Parvez, Habib Mehrez - Application-Specific Mesh-based Heterogeneous FPGA Architectures
Published: 2010-11-17 | ISBN: 1441979271, 1489987886 | PDF | 150 pages | 6.98 MB
Tree-based Heterogeneous FPGA Architectures: Application Specific Exploration and Optimization (Repost)

Umer Farooq, Zied Marrakchi and Habib Mehrez, "Tree-based Heterogeneous FPGA Architectures: Application Specific Exploration and Optimization"
English | ISBN: 1461435935 | 2012 | 198 pages | PDF | 9 MB

x86 Instruction Set Architecture (Repost)  

Posted by step778 at Nov. 28, 2014
x86 Instruction Set Architecture (Repost)

Tom Shanley, "x86 Instruction Set Architecture"
2010 | pages: 1564 | ISBN: 0977087859 | PDF | 15,7 mb
Tree-based Heterogeneous FPGA Architectures: Application Specific Exploration and Optimization

Umer Farooq, Zied Marrakchi and Habib Mehrez, "Tree-based Heterogeneous FPGA Architectures: Application Specific Exploration and Optimization"
English | ISBN: 1461435935 | 2012 | 198 pages | PDF | 9 MB