Asic And Fpga

VLIW Microprocessor Hardware Design: On ASIC and FPGA by Lee Weng Fook [Repost]

VLIW Microprocessor Hardware Design: On ASIC and FPGA by Lee Weng Fook
McGraw-Hill Professional; 1 edition | August 28, 2007 | English | ISBN: 0071497021 | 239 pages | PDF | 2 MB

Acquire the Design Information, Methods, and Skills Needed to Master the New VLIW Architecture! VLIW Microprocessor Hardware Design offers you a complete guide to VLIW hardware design—providing state-of-the-art coverage of microarchitectures, RTL coding, ASIC flow, and FPGA flow of design. The book also contains a wide range of skills-building examples, all worked using Verilog, that equip you with a practical, hands-on tutorial for understanding each step in the VLIW microprocessor design process.
VLIW Microprocessor Hardware Design: On ASIC and FPGA (Repost)

Lee Weng Fook, "VLIW Microprocessor Hardware Design: On ASIC and FPGA"
English | 2007-08-28 | ISBN: 0071497021 | 239 pages | PDF | 4.04 mb
Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems (Repost)

"Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems"
Jean-Pierre Deschamps, Gery J.A. Bioul, Gustavo D. Sutter

English | 2006-03-10 | ISBN: 0471687839 | 578 pages | PDF | 7.7 mb

Synopsys, FPGA Compiler II V2002.5-1 FC3.7.2 ....  Software

Posted by MAZ at Dec. 29, 2005

Synopsys, FPGA Compiler II V2002.5-1 FC3.7.2


Design Compiler FPGA is the only solution available today that is targeted specifically for designers who prototype ASICs using high-end FPGAs. These are the designs that require an ASIC-strength solution. Built upon Synopsys’ Design Compiler technology and incorporating new Adaptive Optimization™ technology, DC FPGA provides the most advanced ASIC synthesis technologies for FPGAs—resulting in a best timing QoR and reliable design results. By eliminating the time consuming and error prone manual conversion between ASIC and FPGA designs, Design Compiler FPGA allows designers to design once at the RTL level and easily target the design to an FPGA prototype and ASIC implementation.

Learn VHDL and FPGA Development with a BASYS 3  

Posted by naag at Feb. 21, 2016
Learn VHDL and FPGA Development with a BASYS 3

Learn VHDL and FPGA Development with a BASYS 3
MP4 | Video: AVC 1280x720 | Audio: AAC 44KHz 2ch | Duration: 13.5 Hours | 1.63 GB
Genre: eLearning | Language: English

Learn how to create a VHDL design that can be simulated and implemented on an FPGA development board.

Learn VHDL and FPGA Development  

Posted by naag at Nov. 9, 2015
Learn VHDL and FPGA Development

Learn VHDL and FPGA Development
MP4 | Video: 1280x720 | 67 kbps | 44 KHz | Duration: 6 Hours | 752 MB
Genre: eLearning | Language: English

Learn how to create a VHDL design that can be simulated and implemented on an FPGA development board.
Learn VHDL, ISE and FPGA by Designing a basic Home Alarm

Learn VHDL, ISE and FPGA by Designing a basic Home Alarm
6 Hours | Video: AVC (.mp4) 1280x720 15fps | Audio: AAC 48KHz 2ch | 2 GB
Genre: eLearning | Language: English

In 6 hours, you will become comfortable with designing in VHDL using ISE tools and test your design on a Basys2 board
VHDL and FPGA Development for Beginners and Intermediates

VHDL and FPGA Development for Beginners and Intermediates
.MP4, AVC, 1000 kbps, 1280x720 | English, AAC, 64 kbps, 2 Ch | 30 Lectures | 561 MB
Instructor: Jordan Christman
Robotic Exploration and Landmark Determination: Hardware-Efficient Algorithms and FPGA Implementations

K. Sridharan, Panakala Rajesh Kumar “Robotic Exploration and Landmark Determination: Hardware-Efficient Algorithms and FPGA Implementations"
Springer | 2008-02-13 | ISBN: 3540753931 | 140 pages | PDF | 1,3 MB
FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version (repost)

Pong P. Chu, "FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version"
English | 2008 | ISBN: 0470185317 | 468 pages | PDF | 17,3 MB

This book uses a "learn by doing" approach to introduce the concepts and techniques of VHDL and FPGA to designers through a series of hands-on experiments.